1. Field of the Invention
The present invention relates to a technique for making a semiconductor device that includes the formation of an improved quality dielectric on a deposited semiconductor layer.
2. Description of the Prior Art
In the production of semiconductor devices, a layer of a dielectric material is often formed on a layer of deposited silicon. For example, as shown in FIG. 1, a first capacitor plate may be formed by depositing a first conductive layer of doped polysilicon (103) on a substrate (101) having a dielectric layer (102) thereon. The top surface of the first polysilicon layer is then oxidized, to form the capacitor dielectric (104). Then, the second capacitor plate is formed by depositing a second conductive layer (105), which may be a metal or doped polysilicon. A high quality capacitor dielectric (105) is indicated by a high breakdown voltage and low leakage current. In another device application, the surface of a deposited polysilicon layer is oxidized to serve as the thin "tunnel" oxide on the floating gate of an electrically erasable programmable read only memory (EEPROM). In that case, the quality of the dielectric is measured by the ability to allow electrons to tunnel from the floating gate while erasing the memory, while preventing the loss of stored charge at other times. In still another device application, a field effect transistor may be formed in a deposited silicon layer. The gate dielectric is then formed by oxidizing the top surface of the deposited silicon layer. The quality of the gate dielectric is measured in terms of low leakage current and low degree of charge trapping, while maintaining a thin dielectric for good device characteristics. The quality of the dielectric depends on the substructure (state of stress, grain structure and defect state) of the top surface of the polysilicon.
Still other device applications exist, and various criteria for a high quality dielectric may be defined in each case. The deposited silicon layer, as noted above, is typically polycrystalline silicon (polysilicon). However, the use of deposited amorphous silicon is also known in the art. The dielectric formed may include a silicon nitride layer in addition to, or in lieu of, the silicon dioxide layer. The usual method of forming the dielectric layer is by heating in an ambient comprising oxygen (to form an oxide) or nitrogen (to form a nitride) or both (to form an oxynitride). Either a dry or steam ambient, at atmospheric or hyperatmospheric pressure, is frequently used for oxide formation. The heating step may be accomplished in a convection oven over a period of an hour or more. However, more recently, the use of rapid thermal oxidation (RTO) has been investigated, so that the dielectric is formed in a few minutes, or even a few seconds. For example, see the description in U.S. Pat. No. 4,814,291, co-assigned with the present invention. Although successful in many respects, the prior art dielectric forming techniques are reaching practical limits in some cases. This is especially so with integrated circuit technologies that produce sub-micron minimum feature sizes.